Diode – Transistor Logic (DTL):
DTL Circuit:
Circuit Operation:
When both inputs are low, diode DA and DB conduct resulting 0.7 volts at point p.
This 0.7 volts at point is not sufficient to drive transistor Q1.
Therefore Q1 is cut-off giving output voltage Vo and Vcc logic 1.
This cause resistor to remain in cutoff and the output voltage is equal to Vcc +logic 1. When both input are logic HIGH, diodes DA and DB are reversed biased.
This cause the base current of transistor Q! To flow through Rd, D1, D2 and the base of the transistor Q1.
This drives transistor Q1 in saturation giving output voltage = VcE = 0.2 v=logic 0.
Therefore we can say that due to diode D1 and D2 we need increased voltage level to drive transistor in saturation.
This improves the noise margin for DTL gate.
Specifications:
Parameter |
Value |
Power Dissipation |
60 mW |
Propagation Delay |
30 nsec |
Noise Margin |
0.7 v |
Fan-out |
8 |
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