MOS Families:
Digital circuit with MOSFET can be grouped into 3 categories:
PMOS, NMOS, CMOS
NMOS Logic:
It contains 2 N-channel MOSFET
Q1 id load and Q2 is switching MOSFET.
Q1 is always on because it is permanently connected to Vdd.
Q1 is made narrow than channel Q2.
When positive voltage is applied between gate and source, Q2 is switched on and it makes the output low.
When the input is low Q2 is switched OFF and output is high.
Vin |
Q2 |
Vo |
0v |
OFF |
+5v |
5v |
ON |
0v |
PMOS Logic:
P-channel enhancement-type MOSFET a negative voltage is needed at the gate terminal to form a channel.
According to the positive logic, Logic 0 is –Vdd < -Vt which is low-voltage signal value, while logic 1 is approximately ground, which is the high voltage signal value.
CMOS Logic:
It consist of two MOSFET in series.
When input is high, the gate of Q1 is at 0v. (Thus Q1 is off)
The gate of Q2 is at +Vdd (the Q2 id On), this produce the output Vout =0.
When the input is low, the gate od Q1 is at a negative potential.
Thus Q1 is On and Q2 is Off, this produce a output Vout=+Vdd
A |
Q1 |
Q2 |
Output |
0 |
ON |
OFF |
1 |
1 |
OFF |
ON |
0 |
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